NVIDIA DOCA SDK Data Center on a Chip Framework Documentation
common.h
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25 
26 #ifndef DOCA_GPU_PACKET_PROCESSING_H
27 #define DOCA_GPU_PACKET_PROCESSING_H
28 
29 #include "defines.h"
31 
32 extern bool force_quit;
33 
34 /* Application configuration structure */
35 struct app_gpu_cfg {
36  char gpu_pcie_addr[DOCA_DEVINFO_PCI_ADDR_SIZE]; /* GPU PCIe address */
37  char nic_pcie_addr[DOCA_DEVINFO_PCI_ADDR_SIZE]; /* Network card PCIe address */
38  uint8_t queue_num; /* Number of GPU receive queues */
39  bool http_server; /* Enable GPU HTTP server */
40 };
41 
42 /* Application TCP receive queues objects */
44  struct doca_gpu *gpu_dev; /* GPUNetio handler associated to queues */
45  struct doca_dev *ddev; /* DOCA device handler associated to queues */
46 
47  uint16_t numq; /* Number of queues processed in the GPU */
48  uint16_t numq_cpu_rss; /* Number of queues processed in the CPU */
49  uint16_t lcore_idx_start; /* Map queues [0 .. numq] to [lcore_idx_start .. lcore_idx_start+numq] */
50  struct rte_mempool *tcp_ack_pkt_pool; /* Memory pool shared by RSS cores to respond with TCP ACKs */
51  struct doca_ctx *eth_rxq_ctx[MAX_QUEUES]; /* DOCA Ethernet receive queue context */
52  struct doca_eth_rxq *eth_rxq_cpu[MAX_QUEUES]; /* DOCA Ethernet receive queue CPU handler */
53  struct doca_gpu_eth_rxq *eth_rxq_gpu[MAX_QUEUES]; /* DOCA Ethernet receive queue GPU handler */
54  struct doca_mmap *pkt_buff_mmap[MAX_QUEUES]; /* DOCA mmap to receive packet with DOCA Ethernet queue */
55  void *gpu_pkt_addr[MAX_QUEUES]; /* DOCA mmap GPU memory address */
56  int dmabuf_fd[MAX_QUEUES]; /* GPU memory dmabuf file descriptor */
57 
58  struct doca_flow_port *port; /* DOCA Flow port */
59  struct doca_flow_pipe *rxq_pipe_gpu; /* DOCA Flow pipe for GPU queues */
60  struct doca_flow_pipe *rxq_pipe_cpu; /* DOCA Flow pipe for CPU queues */
61  struct doca_flow_pipe_entry *cpu_rss_entry; /* DOCA Flow RSS entry for CPU queues */
62 
63  uint16_t nums; /* Number of semaphores items */
64  struct doca_gpu_semaphore *sem_cpu[MAX_QUEUES]; /* One semaphore per queue to report stats, CPU handler*/
65  struct doca_gpu_semaphore_gpu *sem_gpu[MAX_QUEUES]; /* One semaphore per queue to report stats, GPU handler*/
66  struct doca_gpu_semaphore *sem_http_cpu[MAX_QUEUES]; /* One semaphore per queue to report HTTP info, CPU
67  handler*/
68  struct doca_gpu_semaphore_gpu *sem_http_gpu[MAX_QUEUES]; /* One semaphore per queue to report HTTP info, GPU
69  handler*/
70 };
71 
72 /* Application UDP receive queues objects */
74  struct doca_gpu *gpu_dev; /* GPUNetio handler associated to queues*/
75  struct doca_dev *ddev; /* DOCA device handler associated to queues */
76 
77  uint16_t numq; /* Number of queues */
78  struct doca_ctx *eth_rxq_ctx[MAX_QUEUES]; /* DOCA Ethernet receive queue context */
79  struct doca_eth_rxq *eth_rxq_cpu[MAX_QUEUES]; /* DOCA Ethernet receive queue CPU handler */
80  struct doca_gpu_eth_rxq *eth_rxq_gpu[MAX_QUEUES]; /* DOCA Ethernet receive queue GPU handler */
81  struct doca_mmap *pkt_buff_mmap[MAX_QUEUES]; /* DOCA mmap to receive packet with DOCA Ethernet queue */
82  void *gpu_pkt_addr[MAX_QUEUES]; /* DOCA mmap GPU memory address */
83  int dmabuf_fd[MAX_QUEUES]; /* GPU memory dmabuf file descriptor */
84 
85  struct doca_flow_port *port; /* DOCA Flow port */
86  struct doca_flow_pipe *rxq_pipe; /* DOCA Flow receive pipe */
87  struct doca_flow_pipe *root_pipe; /* DOCA Flow root pipe */
88  struct doca_flow_pipe_entry *root_udp_entry; /* DOCA Flow root entry */
89  struct doca_flow_pipe_entry *root_tcp_entry_gpu; /* DOCA Flow root entry */
90  struct doca_flow_pipe_entry *root_tcp_entry_cpu[3]; /* DOCA Flow root entry */
91  struct doca_flow_pipe_entry *root_icmp_entry_gpu; /* DOCA Flow root entry */
92 
93  uint16_t nums; /* Number of semaphores items */
94  struct doca_gpu_semaphore *sem_cpu[MAX_QUEUES]; /* One semaphore per queue, CPU handler*/
95  struct doca_gpu_semaphore_gpu *sem_gpu[MAX_QUEUES]; /* One semaphore per queue, GPU handler*/
96 };
97 
98 /* Application ICMP receive queues objects */
100  struct doca_gpu *gpu_dev; /* GPUNetio handler associated to queues*/
101  struct doca_dev *ddev; /* DOCA device handler associated to queues */
102 
103  uint16_t numq; /* Number of queues */
104  struct doca_ctx *eth_rxq_ctx[MAX_QUEUES]; /* DOCA Ethernet receive queue context */
105  struct doca_eth_rxq *eth_rxq_cpu[MAX_QUEUES]; /* DOCA Ethernet receive queue CPU handler */
106  struct doca_gpu_eth_rxq *eth_rxq_gpu[MAX_QUEUES]; /* DOCA Ethernet receive queue GPU handler */
107  struct doca_mmap *pkt_buff_mmap[MAX_QUEUES]; /* DOCA mmap to receive packet with DOCA Ethernet queue */
108  void *gpu_pkt_addr[MAX_QUEUES]; /* DOCA mmap GPU memory address */
109  int dmabuf_fd[MAX_QUEUES]; /* GPU memory dmabuf file descriptor */
110 
111  struct doca_flow_port *port; /* DOCA Flow port */
112  struct doca_flow_pipe *rxq_pipe; /* DOCA Flow receive pipe */
113 
114  struct doca_ctx *eth_txq_ctx[MAX_QUEUES]; /* DOCA Ethernet send queue context */
115  struct doca_eth_txq *eth_txq_cpu[MAX_QUEUES]; /* DOCA Ethernet send queue CPU handler */
116  struct doca_gpu_eth_txq *eth_txq_gpu[MAX_QUEUES]; /* DOCA Ethernet send queue GPU handler */
117 };
118 
119 /* Tx buffer, used to send HTTP responses */
120 struct tx_buf {
121  struct doca_gpu *gpu_dev; /* GPU device */
122  struct doca_dev *ddev; /* Network DOCA device */
123  uint32_t num_packets; /* Number of packets in the buffer */
124  uint32_t max_pkt_sz; /* Max size of each packet in the buffer */
125  uint32_t pkt_nbytes; /* Effective bytes in each packet */
126  uint8_t *gpu_pkt_addr; /* GPU memory address of the buffer */
127  struct doca_mmap *mmap; /* DOCA mmap around GPU memory buffer for the DOCA device */
128  struct doca_buf_arr *buf_arr; /* DOCA buffer array object around GPU memory buffer */
129  struct doca_gpu_buf_arr *buf_arr_gpu; /* DOCA buffer array GPU handle */
130  int dmabuf_fd; /* GPU memory dmabuf file descriptor */
131 };
132 
133 /* Application GPU HTTP server send queues objects */
135  struct doca_gpu *gpu_dev; /* GPUNetio handler associated to queues*/
136  struct doca_dev *ddev; /* DOCA device handler associated to queues */
137  struct doca_ctx *eth_txq_ctx[MAX_QUEUES]; /* DOCA Ethernet send queue context */
138  struct doca_eth_txq *eth_txq_cpu[MAX_QUEUES]; /* DOCA Ethernet send queue CPU handler */
139  struct doca_gpu_eth_txq *eth_txq_gpu[MAX_QUEUES]; /* DOCA Ethernet send queue GPU handler */
140 
141  struct tx_buf buf_page_index; /* GPU memory buffer for HTTP index page */
142  struct tx_buf buf_page_contacts; /* GPU memory buffer for HTTP contacts page */
143  struct tx_buf buf_page_not_found; /* GPU memory buffer for HTTP not found page */
144 };
145 
146 /* TCP statistics reported by GPU filters */
147 struct stats_tcp {
148  uint32_t http; /* Generic HTTP packet */
149  uint32_t http_head; /* HTTP HEAD packet */
150  uint32_t http_get; /* HTTP GET packet */
151  uint32_t http_post; /* HTTP POST packet */
152  uint32_t tcp_syn; /* TCP with SYN flag */
153  uint32_t tcp_fin; /* TCP with FIN flag */
154  uint32_t tcp_ack; /* TCP with ACK flag */
155  uint32_t others; /* Other TCP packets */
156  uint32_t total; /* Total TCP packets */
157 };
158 
159 /* UDP statistics reported by GPU filters */
160 struct stats_udp {
161  uint64_t dns; /* DNS packet */
162  uint64_t others; /* Other UDP packets */
163  uint64_t total; /* Total UDP packets */
164 };
165 
166 /* HTTP GET packet info used to reply with HTTP response */
167 struct info_http {
168  uint8_t eth_src_addr_bytes[ETHER_ADDR_LEN]; /* Source addr bytes in tx order */
169  uint8_t eth_dst_addr_bytes[ETHER_ADDR_LEN]; /* Destination addr bytes in tx order */
170  uint32_t ip_src_addr; /* IP source address */
171  uint32_t ip_dst_addr; /* IP destination address */
172  uint16_t ip_total_length; /* IP destination address */
173  uint16_t tcp_src_port; /* TCP source port */
174  uint16_t tcp_dst_port; /* TCP destination port */
175  uint8_t tcp_dt_off; /* Data offset */
176  uint32_t tcp_sent_seq; /* TCP TX data sequence number */
177  uint32_t tcp_recv_ack; /* TCP RX data acknowledgment sequence number */
178  enum http_page_get page; /* HTTP page requested */
179 };
180 
181 /* Defined in tcp_session_table.h */
182 struct tcp_session_entry;
183 
184 /*
185  * Register application command line parameters.
186  *
187  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
188  */
190 
191 /*
192  * Initialize a DOCA network device.
193  *
194  * @nic_pcie_addr [in]: Network card PCIe address
195  * @ddev [out]: DOCA device
196  * @dpdk_port_id [out]: DPDK port id associated with the DOCA device
197  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
198  */
199 doca_error_t init_doca_device(char *nic_pcie_addr, struct doca_dev **ddev, uint16_t *dpdk_port_id);
200 
201 /*
202  * Initialize DOCA Flow.
203  *
204  * @port_id [in]: DOCA device DPDK port id
205  * @rxq_num [in]: Receive queue number
206  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
207  */
208 struct doca_flow_port *init_doca_flow(uint16_t port_id, uint8_t rxq_num);
209 
210 /*
211  * Create DOCA Flow pipeline for UDP packets.
212  *
213  * @udp_queues [in]: Application UDP queues
214  * @port [in]: DOCA Flow port associated to the DOCA device
215  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
216  */
217 doca_error_t create_udp_pipe(struct rxq_udp_queues *udp_queues, struct doca_flow_port *port);
218 
219 /*
220  * Create DOCA Flow pipeline for TCP control packets on CPU.
221  *
222  * @tcp_queues [in]: Application TCP queues
223  * @port [in]: DOCA Flow port associated to the DOCA device
224  * @connection_based_flows [in]: TCP connection mode is enabled or not
225  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
226  */
227 doca_error_t create_tcp_cpu_pipe(struct rxq_tcp_queues *tcp_queues, struct doca_flow_port *port);
228 
229 /*
230  * Create DOCA Flow pipeline for TCP packets on GPU.
231  *
232  * @tcp_queues [in]: Application TCP queues
233  * @port [in]: DOCA Flow port associated to the DOCA device
234  * @connection_based_flows [in]: TCP connection mode is enabled or not
235  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
236  */
238  struct doca_flow_port *port,
239  bool connection_based_flows);
240 
241 /*
242  * Create DOCA Flow pipeline for ICMP packets on GPU.
243  *
244  * @icmp_queues [in]: Application ICMP queues
245  * @port [in]: DOCA Flow port associated to the DOCA device
246  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
247  */
248 doca_error_t create_icmp_gpu_pipe(struct rxq_icmp_queues *icmp_queues, struct doca_flow_port *port);
249 
250 /*
251  * Create DOCA Flow root pipeline to distinguish UDP and TCP.
252  *
253  * @udp_queues [in]: Application UDP queues
254  * @tcp_queues [in]: Application TCP queues
255  * @icmp_queues [in]: Application ICMP queues
256  * @port [in]: DOCA Flow port associated to the DOCA device
257  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
258  */
260  struct rxq_tcp_queues *tcp_queues,
262  struct doca_flow_port *port);
263 
264 /*
265  * Destroy DOCA Flow.
266  *
267  * @port_df [in]: DOCA flow port handler
268  * @icmp_queues [in]: Application ICMP queues
269  * @udp_queues [in]: Application UDP queues
270  * @tcp_queues [in]: Application TCP queues
271  * @http_server [in]: HTTP server enabled or not
272  * @http_queues [in]: Application HTTP queues
273  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
274  */
275 doca_error_t destroy_flow_queue(struct doca_flow_port *port_df,
277  struct rxq_udp_queues *udp_queues,
278  struct rxq_tcp_queues *tcp_queues,
279  bool http_server,
280  struct txq_http_queues *http_queues);
281 
282 /*
283  * Enable TCP data traffic to GPU once TCP connection is established.
284  *
285  * @port [in]: DOCA flow port
286  * @queue_id [in]: GPU queue id
287  * @gpu_rss_pipe [in]: GPU DOCA Flow RSS pipe
288  * @session_entry [in]: TCP session
289  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
290  */
291 doca_error_t enable_tcp_gpu_offload(struct doca_flow_port *port,
292  uint16_t queue_id,
293  struct doca_flow_pipe *gpu_rss_pipe,
294  struct tcp_session_entry *session_entry);
295 
296 /*
297  * Disable TCP data traffic to GPU once TCP connection is closed.
298  *
299  * @port [in]: DOCA flow port
300  * @queue_id [in]: GPU queue id
301  * @session_entry [in]: TCP session
302  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
303  */
304 doca_error_t disable_tcp_gpu_offload(struct doca_flow_port *port,
305  uint16_t queue_id,
306  struct tcp_session_entry *session_entry);
307 
308 /*
309  * Create TCP and HTTP server queues
310  *
311  * @tcp_queues [in]: TCP queues handler
312  * @df_port [in]: DOCA flow port
313  * @gpu_dev [in]: DOCA GPUNetIO device
314  * @ddev [in]: DOCA network device
315  * @queue_num [in]: Number of queues to create
316  * @sem_num [in]: Number of semaphores to create
317  * @http_server [in]: Enable HTTP server
318  * @http_queues [in]: HTTP TXQ queues handler
319  * @pe [in]: DOCA PE to associated to HTTP send queue
320  * @event_error_send_packet_cb [in]: DOCA PE callback in case of send packet error event
321  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
322  */
324  struct doca_flow_port *df_port,
325  struct doca_gpu *gpu_dev,
326  struct doca_dev *ddev,
327  uint32_t queue_num,
328  uint32_t sem_num,
329  bool http_server,
331  struct doca_pe *pe,
332  doca_eth_txq_gpu_event_error_send_packet_cb_t event_error_send_packet_cb);
333 
334 /*
335  * Destroy TCP and HTTP server queues
336  *
337  * @tcp_queues [in]: TCP queues handler
338  * @http_server [in]: Enable HTTP server
339  * @http_queues [in]: HTTP TXQ queues handler
340  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
341  */
343  bool http_server,
344  struct txq_http_queues *http_queues);
345 
346 /*
347  * Create UDP queues
348  *
349  * @udp_queues [in]: UDP queues handler
350  * @df_port [in]: DOCA flow port
351  * @gpu_dev [in]: DOCA GPUNetIO device
352  * @ddev [in]: DOCA network device
353  * @queue_num [in]: Number of queues to create
354  * @sem_num [in]: Number of semaphores to create
355  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
356  */
358  struct doca_flow_port *df_port,
359  struct doca_gpu *gpu_dev,
360  struct doca_dev *ddev,
361  uint32_t queue_num,
362  uint32_t sem_num);
363 
364 /*
365  * Destroy UDP queues
366  *
367  * @udp_queues [in]: UDP queues handler
368  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
369  */
371 
372 /*
373  * Create ICMP queues
374  *
375  * @icmp_queues [in]: UDP queues handler
376  * @df_port [in]: DOCA flow port
377  * @gpu_dev [in]: DOCA GPUNetIO device
378  * @ddev [in]: DOCA network device
379  * @queue_num [in]: Number of queues to create
380  * @pe [in]: DOCA PE to associated to ICMP send queue
381  * @event_error_send_packet_cb [in]: DOCA PE callback in case of send packet error event
382  * @event_notify_send_packet_cb [in]: DOCA PE callback in case of send packet debug event
383  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
384  */
386  struct doca_flow_port *df_port,
387  struct doca_gpu *gpu_dev,
388  struct doca_dev *ddev,
389  uint32_t queue_num,
390  struct doca_pe *pe,
391  doca_eth_txq_gpu_event_error_send_packet_cb_t event_error_send_packet_cb,
392  doca_eth_txq_gpu_event_notify_send_packet_cb_t event_notify_send_packet_cb);
393 
394 /*
395  * Destroy ICMP queues
396  *
397  * @icmp_queues [in]: ICMP queues handler
398  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
399  */
401 
402 /*
403  * Create TX buf for HTTP response
404  *
405  * @buf [in]: TX buf to create
406  * @gpu_dev [in]: DOCA GPUNetIO handler
407  * @ddev [in]: DOCA device network card handler
408  * @num_packets [in]: Number of packets in the doca_buf_arr of the txbuf
409  * @max_pkt_sz [in]: Max packet size
410  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
411  */
412 doca_error_t create_tx_buf(struct tx_buf *buf,
413  struct doca_gpu *gpu_dev,
414  struct doca_dev *ddev,
415  uint32_t num_packets,
416  uint32_t max_pkt_sz);
417 
418 /*
419  * Destroy TX buf
420  *
421  * @buf [in]: TX buf to create
422  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
423  */
424 doca_error_t destroy_tx_buf(struct tx_buf *buf);
425 
426 /*
427  * Pre-prepare TX buf filling default values in GPU memory
428  *
429  * @buf [in]: TX buf to create
430  * @page_type [in]: type of page payload to write in every buffer
431  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
432  */
433 doca_error_t prepare_tx_buf(struct tx_buf *buf, enum http_page_get page_type);
434 
435 /*
436  * DOCA PE callback to be invoked if any Eth Txq get an error
437  * sending packets.
438  *
439  * @event_error [in]: DOCA PE event error handler
440  * @event_user_data [in]: custom user data set at registration time
441  */
442 void error_send_packet_cb(struct doca_eth_txq_gpu_event_error_send_packet *event_error,
443  union doca_data event_user_data);
444 
445 /*
446  * DOCA PE callback to be invoked on ICMP Eth Txq to get the debug info
447  * when sending packets
448  *
449  * @event_notify [in]: DOCA PE event debug handler
450  * @event_user_data [in]: custom user data set at registration time
451  */
452 void debug_send_packet_icmp_cb(struct doca_eth_txq_gpu_event_notify_send_packet *event_notify,
453  union doca_data event_user_data);
454 
455 #if __cplusplus
456 extern "C" {
457 #endif
458 
459 /*
460  * Launch a CUDA kernel to specifically receive TCP packets.
461  *
462  * @stream [in]: CUDA stream to launch the kernel
463  * @exit_cond [in]: exit condition set by the CPU to notify the kernel it has to quit
464  * @tcp_queues [in]: list of ethernet + flow queues to use to receive TCP traffic
465  * @http_server [in]: GPU HTTP server mode enabled
466  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
467  */
468 doca_error_t kernel_receive_tcp(cudaStream_t stream,
469  uint32_t *exit_cond,
470  struct rxq_tcp_queues *tcp_queues,
471  bool http_server);
472 
473 /*
474  * Launch a CUDA kernel to specifically receive UDP packets.
475  *
476  * @stream [in]: CUDA stream to launch the kernel
477  * @exit_cond [in]: exit condition set by the CPU to notify the kernel it has to quit
478  * @udp_queues [in]: list of ethernet + flow queues to use to receive TCP traffic
479  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
480  */
481 doca_error_t kernel_receive_udp(cudaStream_t stream, uint32_t *exit_cond, struct rxq_udp_queues *udp_queues);
482 
483 /*
484  * Launch a CUDA kernel to specifically receive ICMP packets.
485  *
486  * @stream [in]: CUDA stream to launch the kernel
487  * @exit_cond [in]: exit condition set by the CPU to notify the kernel it has to quit
488  * @icmp_queues [in]: list of ethernet + flow queues to use to receive ICMP traffic
489  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
490  */
491 doca_error_t kernel_receive_icmp(cudaStream_t stream, uint32_t *exit_cond, struct rxq_icmp_queues *icmp_queues);
492 
493 /*
494  * Launch a CUDA kernel to act as HTTP server
495  *
496  * @stream [in]: CUDA stream to launch the kernel
497  * @exit_cond [in]: exit condition set by the CPU to notify the kernel it has to quit
498  * @tcp_queues [in]: TCP queues with HTTP info semaphore
499  * @http_queues [in]: HTTP TXQ queues
500  * @return: DOCA_SUCCESS on success and DOCA_ERROR otherwise
501  */
502 doca_error_t kernel_http_server(cudaStream_t stream,
503  uint32_t *exit_cond,
504  struct rxq_tcp_queues *tcp_queues,
505  struct txq_http_queues *http_queues);
506 
507 #if __cplusplus
508 }
509 #endif
510 
511 #endif
doca_error_t kernel_receive_icmp(cudaStream_t stream, uint32_t *exit_cond, struct rxq_icmp_queues *icmp_queues)
doca_error_t enable_tcp_gpu_offload(struct doca_flow_port *port, uint16_t queue_id, struct doca_flow_pipe *gpu_rss_pipe, struct tcp_session_entry *session_entry)
Definition: flow.c:841
struct doca_flow_port * init_doca_flow(uint16_t port_id, uint8_t rxq_num)
Definition: flow.c:37
doca_error_t destroy_flow_queue(struct doca_flow_port *port_df, struct rxq_icmp_queues *icmp_queues, struct rxq_udp_queues *udp_queues, struct rxq_tcp_queues *tcp_queues, bool http_server, struct txq_http_queues *http_queues)
Definition: flow.c:944
doca_error_t create_tx_buf(struct tx_buf *buf, struct doca_gpu *gpu_dev, struct doca_dev *ddev, uint32_t num_packets, uint32_t max_pkt_sz)
Definition: http_txbuf.c:97
doca_error_t create_tcp_gpu_pipe(struct rxq_tcp_queues *tcp_queues, struct doca_flow_port *port, bool connection_based_flows)
Definition: flow.c:395
doca_error_t register_application_params(void)
Definition: args.c:120
void debug_send_packet_icmp_cb(struct doca_eth_txq_gpu_event_notify_send_packet *event_notify, union doca_data event_user_data)
doca_error_t kernel_receive_udp(cudaStream_t stream, uint32_t *exit_cond, struct rxq_udp_queues *udp_queues)
doca_error_t destroy_tx_buf(struct tx_buf *buf)
Definition: http_txbuf.c:287
doca_error_t destroy_tcp_queues(struct rxq_tcp_queues *tcp_queues, bool http_server, struct txq_http_queues *http_queues)
Definition: tcp_queues.c:485
doca_error_t create_root_pipe(struct rxq_udp_queues *udp_queues, struct rxq_tcp_queues *tcp_queues, struct rxq_icmp_queues *icmp_queues, struct doca_flow_port *port)
Definition: flow.c:632
doca_error_t destroy_icmp_queues(struct rxq_icmp_queues *icmp_queues)
Definition: icmp_queues.c:291
doca_error_t init_doca_device(char *nic_pcie_addr, struct doca_dev **ddev, uint16_t *dpdk_port_id)
Definition: device.c:80
doca_error_t create_icmp_queues(struct rxq_icmp_queues *icmp_queues, struct doca_flow_port *df_port, struct doca_gpu *gpu_dev, struct doca_dev *ddev, uint32_t queue_num, struct doca_pe *pe, doca_eth_txq_gpu_event_error_send_packet_cb_t event_error_send_packet_cb, doca_eth_txq_gpu_event_notify_send_packet_cb_t event_notify_send_packet_cb)
Definition: icmp_queues.c:34
doca_error_t kernel_http_server(cudaStream_t stream, uint32_t *exit_cond, struct rxq_tcp_queues *tcp_queues, struct txq_http_queues *http_queues)
bool force_quit
doca_error_t disable_tcp_gpu_offload(struct doca_flow_port *port, uint16_t queue_id, struct tcp_session_entry *session_entry)
Definition: flow.c:901
doca_error_t destroy_udp_queues(struct rxq_udp_queues *udp_queues)
Definition: udp_queues.c:271
doca_error_t kernel_receive_tcp(cudaStream_t stream, uint32_t *exit_cond, struct rxq_tcp_queues *tcp_queues, bool http_server)
doca_error_t create_tcp_cpu_pipe(struct rxq_tcp_queues *tcp_queues, struct doca_flow_port *port)
Definition: flow.c:280
doca_error_t create_icmp_gpu_pipe(struct rxq_icmp_queues *icmp_queues, struct doca_flow_port *port)
Definition: flow.c:526
void error_send_packet_cb(struct doca_eth_txq_gpu_event_error_send_packet *event_error, union doca_data event_user_data)
doca_error_t create_udp_pipe(struct rxq_udp_queues *udp_queues, struct doca_flow_port *port)
Definition: flow.c:176
doca_error_t create_udp_queues(struct rxq_udp_queues *udp_queues, struct doca_flow_port *df_port, struct doca_gpu *gpu_dev, struct doca_dev *ddev, uint32_t queue_num, uint32_t sem_num)
Definition: udp_queues.c:34
doca_error_t create_tcp_queues(struct rxq_tcp_queues *tcp_queues, struct doca_flow_port *df_port, struct doca_gpu *gpu_dev, struct doca_dev *ddev, uint32_t queue_num, uint32_t sem_num, bool http_server, struct txq_http_queues *http_queues, struct doca_pe *pe, doca_eth_txq_gpu_event_error_send_packet_cb_t event_error_send_packet_cb)
Definition: tcp_queues.c:36
doca_error_t prepare_tx_buf(struct tx_buf *buf, enum http_page_get page_type)
Definition: http_txbuf.c:217
#define MAX_QUEUES
Definition: defines.h:62
#define ETHER_ADDR_LEN
Definition: defines.h:77
http_page_get
Definition: defines.h:90
static struct doca_pe * pe
static struct rxq_icmp_queues icmp_queues
static struct doca_flow_port * df_port
static struct rxq_tcp_queues tcp_queues
static struct rxq_udp_queues udp_queues
static struct doca_gpu * gpu_dev
static struct txq_http_queues http_queues
static struct doca_dev * ddev
#define DOCA_DEVINFO_PCI_ADDR_SIZE
Buffer size to hold PCI BDF format: "XXXX:XX:XX.X". Including a null terminator.
Definition: doca_dev.h:313
enum doca_error doca_error_t
DOCA API return codes.
void(* doca_eth_txq_gpu_event_error_send_packet_cb_t)(struct doca_eth_txq_gpu_event_error_send_packet *event_error, union doca_data event_user_data)
Function to be executed on send packet error event occurrence.
void(* doca_eth_txq_gpu_event_notify_send_packet_cb_t)(struct doca_eth_txq_gpu_event_notify_send_packet *event_notify, union doca_data event_user_data)
Function to be executed on send packet notify event occurrence.
uint16_t queue_id
Definition: ip_frag_dp.c:1
uint8_t queue_num
Definition: common.h:38
bool http_server
Definition: common.h:39
char nic_pcie_addr[DOCA_DEVINFO_PCI_ADDR_SIZE]
Definition: common.h:37
char gpu_pcie_addr[DOCA_DEVINFO_PCI_ADDR_SIZE]
Definition: common.h:36
uint32_t tcp_sent_seq
Definition: common.h:176
uint16_t ip_total_length
Definition: common.h:172
uint32_t tcp_recv_ack
Definition: common.h:177
uint8_t eth_src_addr_bytes[ETHER_ADDR_LEN]
Definition: common.h:168
uint16_t tcp_src_port
Definition: common.h:173
enum http_page_get page
Definition: common.h:178
uint32_t ip_dst_addr
Definition: common.h:171
uint8_t tcp_dt_off
Definition: common.h:175
uint8_t eth_dst_addr_bytes[ETHER_ADDR_LEN]
Definition: common.h:169
uint16_t tcp_dst_port
Definition: common.h:174
uint32_t ip_src_addr
Definition: common.h:170
struct doca_gpu * gpu_dev
Definition: common.h:100
struct doca_flow_port * port
Definition: common.h:111
uint16_t numq
Definition: common.h:103
struct doca_mmap * pkt_buff_mmap[MAX_QUEUES]
Definition: common.h:107
struct doca_eth_txq * eth_txq_cpu[MAX_QUEUES]
Definition: common.h:115
struct doca_dev * ddev
Definition: common.h:101
struct doca_flow_pipe * rxq_pipe
Definition: common.h:112
void * gpu_pkt_addr[MAX_QUEUES]
Definition: common.h:108
int dmabuf_fd[MAX_QUEUES]
Definition: common.h:109
struct doca_ctx * eth_txq_ctx[MAX_QUEUES]
Definition: common.h:114
struct doca_ctx * eth_rxq_ctx[MAX_QUEUES]
Definition: common.h:104
struct doca_gpu_eth_txq * eth_txq_gpu[MAX_QUEUES]
Definition: common.h:116
struct doca_gpu_eth_rxq * eth_rxq_gpu[MAX_QUEUES]
Definition: common.h:106
struct doca_eth_rxq * eth_rxq_cpu[MAX_QUEUES]
Definition: common.h:105
uint16_t numq
Definition: common.h:47
uint16_t numq_cpu_rss
Definition: common.h:48
struct doca_flow_pipe_entry * cpu_rss_entry
Definition: common.h:61
struct doca_gpu_semaphore * sem_http_cpu[MAX_QUEUES]
Definition: common.h:66
void * gpu_pkt_addr[MAX_QUEUES]
Definition: common.h:55
struct doca_dev * ddev
Definition: common.h:45
struct doca_flow_pipe * rxq_pipe_cpu
Definition: common.h:60
struct doca_gpu_eth_rxq * eth_rxq_gpu[MAX_QUEUES]
Definition: common.h:53
struct doca_flow_pipe * rxq_pipe_gpu
Definition: common.h:59
struct rte_mempool * tcp_ack_pkt_pool
Definition: common.h:50
struct doca_gpu_semaphore_gpu * sem_gpu[MAX_QUEUES]
Definition: common.h:65
uint16_t nums
Definition: common.h:63
struct doca_flow_port * port
Definition: common.h:58
int dmabuf_fd[MAX_QUEUES]
Definition: common.h:56
struct doca_gpu * gpu_dev
Definition: common.h:44
struct doca_ctx * eth_rxq_ctx[MAX_QUEUES]
Definition: common.h:51
struct doca_mmap * pkt_buff_mmap[MAX_QUEUES]
Definition: common.h:54
struct doca_eth_rxq * eth_rxq_cpu[MAX_QUEUES]
Definition: common.h:52
struct doca_gpu_semaphore * sem_cpu[MAX_QUEUES]
Definition: common.h:64
uint16_t lcore_idx_start
Definition: common.h:49
struct doca_gpu_semaphore_gpu * sem_http_gpu[MAX_QUEUES]
Definition: common.h:68
struct doca_gpu_semaphore_gpu * sem_gpu[MAX_QUEUES]
Definition: common.h:95
struct doca_flow_port * port
Definition: common.h:85
struct doca_gpu_eth_rxq * eth_rxq_gpu[MAX_QUEUES]
Definition: common.h:80
struct doca_eth_rxq * eth_rxq_cpu[MAX_QUEUES]
Definition: common.h:79
struct doca_flow_pipe * root_pipe
Definition: common.h:87
uint16_t numq
Definition: common.h:77
struct doca_flow_pipe * rxq_pipe
Definition: common.h:86
struct doca_dev * ddev
Definition: common.h:75
struct doca_flow_pipe_entry * root_udp_entry
Definition: common.h:88
uint16_t nums
Definition: common.h:93
struct doca_gpu_semaphore * sem_cpu[MAX_QUEUES]
Definition: common.h:94
struct doca_gpu * gpu_dev
Definition: common.h:74
struct doca_mmap * pkt_buff_mmap[MAX_QUEUES]
Definition: common.h:81
void * gpu_pkt_addr[MAX_QUEUES]
Definition: common.h:82
struct doca_flow_pipe_entry * root_tcp_entry_cpu[3]
Definition: common.h:90
struct doca_flow_pipe_entry * root_tcp_entry_gpu
Definition: common.h:89
struct doca_ctx * eth_rxq_ctx[MAX_QUEUES]
Definition: common.h:78
int dmabuf_fd[MAX_QUEUES]
Definition: common.h:83
struct doca_flow_pipe_entry * root_icmp_entry_gpu
Definition: common.h:91
uint32_t others
Definition: common.h:155
uint32_t http_post
Definition: common.h:151
uint32_t tcp_ack
Definition: common.h:154
uint32_t total
Definition: common.h:156
uint32_t http_head
Definition: common.h:149
uint32_t http_get
Definition: common.h:150
uint32_t tcp_fin
Definition: common.h:153
uint32_t tcp_syn
Definition: common.h:152
uint32_t http
Definition: common.h:148
uint64_t others
Definition: common.h:162
uint64_t dns
Definition: common.h:161
uint64_t total
Definition: common.h:163
Definition: common.h:120
struct doca_mmap * mmap
Definition: common.h:127
struct doca_buf_arr * buf_arr
Definition: common.h:128
uint32_t pkt_nbytes
Definition: common.h:125
struct doca_gpu_buf_arr * buf_arr_gpu
Definition: common.h:129
uint8_t * gpu_pkt_addr
Definition: common.h:126
uint32_t max_pkt_sz
Definition: common.h:124
int dmabuf_fd
Definition: common.h:130
struct doca_dev * ddev
Definition: common.h:122
uint32_t num_packets
Definition: common.h:123
struct doca_gpu * gpu_dev
Definition: common.h:121
struct tx_buf buf_page_contacts
Definition: common.h:142
struct doca_gpu * gpu_dev
Definition: common.h:135
struct tx_buf buf_page_not_found
Definition: common.h:143
struct doca_dev * ddev
Definition: common.h:136
struct doca_eth_txq * eth_txq_cpu[MAX_QUEUES]
Definition: common.h:138
struct doca_gpu_eth_txq * eth_txq_gpu[MAX_QUEUES]
Definition: common.h:139
struct tx_buf buf_page_index
Definition: common.h:141
struct doca_ctx * eth_txq_ctx[MAX_QUEUES]
Definition: common.h:137
Convenience type for representing opaque data.
Definition: doca_types.h:56